CS 362 Introduction to Computer Architecture

Loyola University Chicago

Fall 2024

Summary

  • This is an advanced course that teaches how a computer works at a hardware level.
  • The schedule on this page lists the topics we will cover by date.

Required Materials

Office Hours

  • Doyle 309
  • Tuesday: Noon - 1PM
  • Or by appointment

Grading

  • Treat this course like a job where you are trying to get promoted. If you show up and do your work, you will get a good grade.
  • No partial credit for code that does not compile.
    • Homework: 20 %
    • Participation: 10 %
    • Progress: 10 %
    • Checkins & Quizzes: 20 %
    • Project: 40 %
    Percentage Letter Grade
    91+ A
    89-90 A-
    87-88 B+
    77-86 B
    75-76 B-
    73-74 C+
    62-72 C
    60-61 C-
    50-59 D
    Below 50 F

Scheduling Conflicts

  • If you have a (legitimate) scheduling conflict with a quiz or exam, it is possible to schedule a makeup session. You must let me know at least two weeks prior to the quiz/exam date. Legitimate scheduling conflicts include religious observances.
  • LUC's academic calendar can be found here.

Mandatory Reporter Statment

  • Each faculty and staff member at Loyola University Chicago is required to report any incidents of gender-based misconduct that they are made aware of, even if it happened in the past. Gender-based misconduct includes discrimination based on actual or perceived sex, sexual orientation, gender expression or identity, or pregnancy or parenting status; dating and domestic violence; sexual misconduct (including sexual assault, sexual harassment, and sexual exploitation); and stalking.

Tools

Programming Resources

Collaboration

  • Students are expected to write their own code for homework assignments. No copying or code sharing is allowed. Copying code from the Internet is also not allowed.

Course Schedule

Tenative

Date Topic Details
Mon 08/26 Intro
Wed 08/28 Throughput, MIPS, Amdahl's Law, Iron Law, Instructions Homework 1 Assigned
Further Reading:
  • Patterson & Hennesy 1.4-1.6
Mon 09/02 Labor Day: No Class
Wed 09/04 Combinatorial Logic Review Homework 2: Flip Flops Homework
DE10 Guide
Further Reading:
  • Patterson & Hennesy Chapter 2
Mon 09/09 Sequential Logic Review Homework 1 Due
Further Reading:
  • Patterson & Hennesy Chapter 2
Wed 09/11 Verilog Tutorial Homework 2 Due
Homework 3: 2-1/4-1 Muxes and Full Adder in Verilog
dff.v
Further Reading:
  • Patterson & Hennesy 2.5
Mon 09/16 Verilog Tutorial Further Reading:
  • Patterson & Hennesy A.2-A.4
Wed 09/18 Ripple Carry and Carry Select Adders Homework 3 Due
Homework 4: Implement (1) 32-bit Barrel Shifter, (2) an ALU & (3) Register File in Verilog
Video: Synthesizing a Simple Design on the DE10-Lite
Mon 09/23 Carry Lookahead Adder Further Reading:
  • Patterson & Hennesy A.6
Wed 09/25 ALUs RISC-V Test Code Template
Further Reading:
  • Patterson & Hennesy A.5
Mon 09/30 Single-Cycle Processor Datapath Homework 4 Due
Start working on Project Schematic
Further Reading:
  • Patterson & Hennesy 4.1-4.3
Wed 10/02 Single Cycle Processor Control Path memory2c.v
Further Reading:
  • Patterson & Hennesy 4.4
Mon 10/07 Fall Break: No Class
Wed 10/09 Project Design Review
Mon 10/14 Pipeline Datapath Further Reading:
  • Patterson & Hennesy 4.6
Wed 10/16 Pipeline Control
Mon 10/21 Pipelining: Control Dependences & Branch Delay Slot Further Reading:
  • Patterson & Hennesy 4.7-4.8
Wed 10/23 Phase I Demo Day Further Reading:
  • Patterson & Hennesy 4.9
Mon 10/28 Cache Concepts Further Reading:
  • Patterson & Hennesy 5.1-5.2
Wed 10/30 Cache Design Further Reading:
  • Patterson & Hennesy 5.3
Mon 11/04 Cache Design
Wed 11/06 Cache Performance
Mon 11/11 Virtual Memory Project Phase I Due
Wed 11/13 Phase II Demo Day Demo Signup
Further Reading:
  • Patterson & Hennesy 5.7
Mon 11/18 Main Memory Further Reading:
  • Patterson & Hennesy A.9
Wed 11/20 I/O
Mon 11/25 Superscalar Further Reading:
Wed 11/27 Thanksgiving: No Class
Mon 12/02 Out of order
Wed 12/04 Booth's Algorithm for Multiplication
Mon 12/09 Floating Point
Wed 12/11 Final Demo Day
Mon 12/16
Wed 12/18
Mon 12/23
Wed 12/25
Mon 12/30
Wed 01/01
Mon 01/06
Wed 01/08
Mon 01/13
Wed 01/15
Mon 01/20
Wed 01/22
Mon 01/27
Wed 01/29 Phase III Demo Day